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词汇
variable logic
释义
variable logic
可变逻辑
可以根据预编程式加以改变的内部逻辑设计。这种程式控制闸线路的内部连接,即指令系统可用电子仪器进行改变。
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decasyllabic
decasyllable
decathlete
decathlon
decay
decayed
Deccan
decd.
decease
deceased
decedent
deceit
deceitful
deceitfully
deceitfulness
deceivable
deceive
deceiver
decel.
decelerate
deceleration
deceleration time
December
December position
decemvir
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